Resume of Joe Obrin

596 Cantabria Drive
Davenport, FL 33837

Mr. Obrin is experienced in the areas of programmable logic design, embedded processor software and hardware, low frequency analog design, and voice and data communications.


B.S.E.E. with Academic Distinction (GPA=4.00), University of Colorado, 1980.
Graduate Studies, University of Colorado, 1980.

Areas of Expertise

Over 30 years of experience in a variety of areas: Microcomputer design and development, with an emphasis in embedded processor design; Microcomputer firmware development; Computer networking, including the Internet and custom embedded network solutions; Project management; Commercial and military electronics; Programmable logic (FPGAs and CPLDs); Integrated circuit design; Board and system level design; Self-diagnostic systems; Digital and analog circuit design; Voice and data telecommunications.

Programmable Logic

Over twenty five years of expertise in programmable logic, with various tools, vendors and environments. Emphasis in Xilinx products and Verilog and VHDL IP development.


TCP/IP stack design and debug, html and web expertise, voice communications.

Operating Systems

Macintosh, Unix (Solaris, Linux, and HPUX), MS Windows, pSOS, other embedded systems.

Computer Languages

C, C++, html, Basic, Assembly, Java, Verilog, VHDL.


80x86 series, 680x0 series, 8051, 68HC11, 68360, Power PC, 1750A, i960, PicoBlaze, Microblaze, others.

Work Experience

Retired, July 2018-Present

Owner, Four Point OH Consulting, July 2003-July 2018

Four Point OH Consulting specializes in programmable logic applications, embedded processor hardware and software, low frequency analog design, and electronics production support. Projects have included large Xilinx and Actel FPGA designs, I960 and 1750A processor designs, and Mil STD 1553 Interface work.

One of Four Point OH Consulting's clients was Ceebus Technologies, LLC.  During this time, Ceebus was working on a grant funded by Navy Special Operations Command (SoCOM) to provide a secure (handheld) underwater communications system for theNavy SEALs.  Mr. Obrin designed most of the cards in this system, including the Display Board  and the Processor Board.  The Processor Board included a large Xilinx FPGA (first generation Spartan 3A DSP, second generations Spartan 6).  Mr. obrin also wrote the VHDL for this FPGA, including processor (Microblaze) interface, memory and display handling, and extensive DSP algorithms.  There were over 11,000 lines of VHDL in this project.  Mr. Obrin was also extensively involved i both unit and system test.

Four Point OH Consulting provided design services to Analytical Spectral Devices, Inc. (ASDI). ASDI produces spectrometers of various types for both industrial and scientific clients. Four Point OH was involved in the development of their second generation hand held unit, which was based upon a Microblaze processor contained in a Xilinx FPGA, running a variant of the Linux operating system. Four Point OH provided design services in the areas of processor and memory architecture and clock tree design, as well as interface design, including USB, QVGA, and Ethernet interfaces for this processor. Four Point OH provided detailed schematic design for the digital portion of this system, as well as FPGA design support to exploit the Byte Parallel Interface (BPI) and Suspend (low power mode) features of the the Spartan 3A family.

One of the recent clients of Four Point OH Consulting was Design Net Engineering. During a contract for Design Net, Four Point OH provided the VHDL code and other design services associated with an RTAX series Actel FPGA. This FPGA was used on the RPB (Reprogrammable Processor Board) for the Plug and Play Satellite (PNP-Sat) project for Air Force Research Lab (AFRL). Four Point OH provided the VHDL code and complete simulation of this chip, which was a support peripheral and power switching manager for the Microblaze Processor (contained in a different FPGA).

During this period, one of the primary clients of Four Point OH was Analex corporation. Analex conducts Independent Validation and Verification of flight vehicle software for the United States Air Force. In connection with this, Analex develops and builds systems which emulate all aspects of the flight vehicle hardware, such that the software under test sees exactly the same environment that it does during flight. The software even runs on the same processors that it does in a flight system.

Four Point OH was heavily involved in the development of the two most recent emulation systems for Analex, ACTIV-A and ACTIV-D. One of these emulators was for the Atlas spacecraft, and the other was for the Delta spacecraft. Four Point OH designed all of the unique circuit cards for these two projects. These cards included the 1750A processor, an i960 processor for support functions, an interface to the PCI bus (both emulators were PCI based), 1553 serial interface hardware, RS-232 serial interfaces, flight and support memory, several (Xilinx) FPGAs, several PicoBlaze processors, and human interface features (front panel lights and switches). A complete ACTIV-D system has three 1750s and three i960s acting in tandem with the host (Intel Pentium) processor. A complete ACTIV-A system has four 1750As, four i960s, and ten PicoBlaze processors acting in tandem with the host.

In addition to providing the primary design and schematic generation for the circuit boards, Four Point OH provided the interface to the card layout designer (through a subcontractor). Four Point OH also helped to interface with the circuit card vendors for fabrication, assembly, and post assembly (JTAG) testing.

Four Point OH not only developed the circuit boards for this project, but also developed the VHDL for several of the FPGAS on these cards. These were Xilinx FPGAs and the logic included PicoBlaze instantiation, program memory, and interface to the rest of the system, control and boot memory interface for the i960, the load interface for the larger Virtex part on the board, human interface (switches and lights), a fully functional UART for RS-232 communication (to a remote host), additional UARTs for interboard communication.

Four Point OH also contributed VHDL to the largest FPGA in the system, providing the initial clock and reset design.

In addition to developing the cards and the VHDL for several of the FPGAs, Four Point OH wrote almost all of the PicoBlaze software. This included a simple monitor for human interface to the PicoBlaze processors via a remote host.

Four Point OH was deeply involved in the initial test of these cards, through system integration. This included the testing of IP provided by other contractors (to the large FPGA). Four Point OH developed many of the test procedures, and held primary responsibility for diagnosing and correcting hardware problems.

Four Point OH developed a separate test set for one of the cards in the system (the 1553 Card) to facilitate rapid testing of multiple 1553 cards, and provide schedule relief. This test set was also PicoBlaze based. Four Point OH wrote the software for this test set, and developed the test procedures used for testing the 1553 Card.

Four Point OH contributed substantially to the documentation for both systems, including major contributions to the Hardware Descriptions Documents (HDDs).

Advisory Engineer Storage Technology Corporation (STC), January 1997-June 2003

Mr. Obrin led a team which redesigned the Iceberg Support Processor (ISP) in STC's Iceberg. The Iceberg is a Disk Array Storage Device (DASD), which supplies up to 3 terabytes of on-line storage in a single unit. The ISP is the processor which manages all tasks for this system, excluding the actual data path from the host to the storage devices. Among the functions of the ISP are environmental monitoring and reporting, redundancy management, field service notifications, remote service access, power management, and operator interface. The ISP also loads not only it's own functional code from disk, it also loads the functional code for the main data path processor, and transfers that code over a proprietary interface.

Mr. Obrin and his team modernized the design of the ISP. This design emphasized use of leading edge Xilinx programmable solutions. Among the improvements were replacing the 68010 processor with a highly integrated 68360 processor, replacing all of the discrete SSI, MSI and VLSI logic with VLSI Field Programmable Gate Arrays (FPGAs), upgrading the programmer's and remote service interfaces from RS-232 to Ethernet (Internet), significant cost reductions, enhanced reliability, removal of various obsolete components, and increasing the speed of the overall system.

Mr. Obrin rewrote the software interface and hardware design specs, redesigned the circuit card, and designed the FPGAs. Tools used in the design environment included Verilog, Synopsys, and Xilinx fitter software.

Mr. Obrin has developed the software to exploit the Ethernet connection on the ISP. This task was originally assigned to a software group, but Mr. Obrin became involved due to a lack of progress from the software team. The software team had been unsuccessful in getting the network software to work for nearly three years, Mr. Obrin had it functional in six months. A large part of this effort involved investigating changes which had been made to the (pSOS) OS which prevented the TCP/IP stack from functioning properly. After getting the stack to work in a basic fashion, Mr. Obrin proceeded to develop a client server application to provide file transfer functions to the ISP card. Ultimately, this application evolved to replace all of the functions of the physical operator panel. The operator panel could then be removed from the design of the SVA, for a substantial cost saving. The server side of this application ran under pSOS, and the client under Solaris. Mr. Obrin developed both the server and client sides of this application.

ISP hardware designs and software integration have consistently been completed ahead of schedule. Mr. Obrin worked in liaison with software team for hardware/software integration on ISP2. For the third generation ISP card (ISP3), Mr. Obrin rewrote the low level hardware interface firmware, to accommodate changes made in the hardware design.

Design Engineer, Test and Measurement Systems (TAMS),July 1995-December 1996

TAMS is a small company in Loveland, Colorado, which enjoys a strategic relationship with Hewlett Packard (HP). TAMS concentrates on the test and measurement marketplace, and the application of computer systems to this marketplace. TAMS provides engineering services to HP in these areas. TAMS also provides products and services directly to HP customers in these areas.

Mr. Obrin developed an HPIB card for the 712 model, series 9000 HPUX workstation. The HPIB standard bus is an industry standard control link which allows a computer system to control a room full of laboratory or industrial instruments. The HP 712 workstation is a PA-RISC based workstation which runs HP's Unix. Mr. Obrin designed the card and developed the EPLD which implemented the logic design. Mr. Obrin wrote a low-level ('C') driver to integrate the card into the Unix environment.

As a follow-on to this design, Mr. Obrin was involved in the design of an HPIB card for the PCI bus.

He also spearheaded the SICL support contract from HP. SICL is the library which allows programs running under Unix or Windows to access hardware through a consistent API. SICL is written in C++.

Owner, Four Point OH Consulting, President, VReality, Inc., April 1993-June 1995

Mr. Obrin was the founder and owner of Four Point OH Consulting (4.0). 4.0 provided both software and hardware design engineering to clients throughout metro Denver. In addition, 4.0 was involved in video production, including computer animation and special effects, event videography, teaching, and technical support. 4.0 released KideoTM, a mass-marketed video product aimed at children. 4.0 also worked on development of new video technologies and programs for the United States Department of Education, in association with the Responsive Environments Foundation (REF).

As president of VReality, Inc., Mr. Obrin conducted research in applying virtual reality (VR) to education.

Senior Engineer/Principal Investigator, Ball Aerospace Systems Group (BASG), Space Systems Division, May 1986-March 1993

Mr. Obrin led a team developing new embedded computer systems for spacecraft. Each year, he would develop research goals for the coming year, including schedule, budget requirements, facilities, staffing, equipment, and materials. He would then submit a proposal jointly to BASG management and the federal government. Based upon this proposal, his project would be funded for the coming year. He was then responsible for meeting these goals. He was so successful in meeting his research goals that his proposals were funded for seven consecutive years (typical budget $300K/year), taking up to 1/3 of the research budget from the entire division (in a field where 30 proposals may be submitted).

Once receiving his budget, he would assemble and lead a team to its goals, keeping control over budget, facilities, and schedule, guiding technical activities, and making significant technical contributions himself.

His technical contributions included, but were not limited to, design of the core processor and memory system, design of analog input and analog to digital conversion circuitry, design of video acquisition circuitry, design of servo circuitry, development of programmable logic and ASIC solutions, design of test equipment and procedures, and development of microcomputer firmware.

Mr. Obrin's computer architectures were used on various spacecraft built by BASG for NASA and the DoD. They were also included in various spacecraft proposals submitted by BASG to the government.

The on-board computer systems developed by Mr. Obrin are responsible for all facets of spacecraft control, encompassing power management, communications, attitude control, propulsion, thermal control, and data storage. Mr. Obrin developed various computer architectures in response to project needs.

Project Manager, ITT Chernow Communications, Inc., May 1984-April 1986

In these two years, Mr. Obrin served as project manager on a Z-80 based telephone line router. This device is a PBX which cannot receive incoming calls. Mr. Obrin coordinated all phases of the project, taking in electronics design, assembly, and debug; documentation and test procedures; enclosure design and manufactures of prototypes; printed circuit artwork; and software design and implementation.

Associate Engineer, BASG, 1983-1984
Research Engineer, Chernow Communications, 1981-1983
Integrated Circuit Design Engineer, Texas Instruments, Inc., 1980-1981

At BASG, Mr. Obrin designed a Microcomputer on-board the OAMP instrument. This was a Z-80 based microcomputer which collected "housekeeping" data from all areas of a large scientific instrument. At Chernow, he designed hardware enhancements to a microprocessor-based telephone resale accounting system. At Texas Instruments, Mr. Obrin was on a team developing a VLSI telecommunications chip.